1. Field of the Invention
The present invention relates to a semiconductor device. The semiconductor device means any device which can function by using semiconductor characteristics. Further, the present invention relates to a driving circuit of a display device. Additionally, the present invention includes electronic equipment fabricated by using the driving circuit of the display device. Note that, in the present specification, the display device includes a liquid crystal display device obtained by using a liquid crystal element for a pixel, and a light emitting display device obtained by using a self-luminous element such as an organic electroluminescence (EL) element or the like. The driving circuit means a circuit for carrying out a processing to input image signals to pixels arranged in the display device and to display an image, and includes a pulse circuit such as a shift register or the like, and an amplifying circuit such as an amplifier or the like.
2. Description of the Related Art
In recent years, a semiconductor device (a display device) in which a semiconductor thin film is formed on an insulator, especially on a glass substrate, especially an active matrix type display device using a thin film transistor (hereinafter referred to as a TFT) has come into wide use remarkably. The active matrix type display device using the TFT includes hundreds of thousands to millions of pixels which are arranged so as to be formed into a matrix shape, and an electric charge of each of the pixels is controlled by a TFT arranged in each of the pixels, so that an image is displayed.
Further, as a recent technique, a technique relating to a polysilicon TFT in which a driving circuit is simultaneously formed using TFTs in a region around a pixel portion, in addition to a pixel TFT constituting a pixel, has been developed, which greatly contributes to the miniaturization of a device and the reduction in consumed electric power, and as a result of that, the display device becomes an indispensable device for a display portion etc. of a mobile information terminal an application field of which is remarkably expanded in recent years.
As the semiconductor device (the driving circuit of the display device), a CMOS circuit in which an N-type TFT and a P-type TFT are combined is usually employed. The CMOS circuit is characterized by the following two points: a current flows only at an instant when a logic is changed and a current does not flow during a period in which a certain logic is held; and a current flows only at an instant when a logic is changed and there is only a minute leak current during a period in which a certain logic is held (although the preferable leak current is zero). The CMOS circuit has the foregoing two characteristics, thus the CMOS circuit has advantages such that the consumed current in the whole circuit can be reduced, and high speed driving can be excellently performed.
Note that, the term “logic” indicates an H level or an L level. Also, the term “logic change” indicates that the H level is changed to the L level or the L level is changed to the H level.
As mobile electronic equipment is miniaturized and is reduced in weight, demand for a display device using liquid crystal or self-luminous elements is rapidly increased, however, from the viewpoint of the yield and the like, it is difficult to reduce the manufacturing cost to the level sufficiently low. It is easily supposed that the demand is further rapidly increased in future, and accordingly, it is desired that the display device can be supplied more inexpensively.
As a method of fabricating a driving circuit on an insulator, there is a common method in which patterns of active layers, wiring lines and the like are formed through exposure treatment and etching with a plurality of photomasks. However, the number of steps during this processing directly influences the manufacturing cost, therefore it is ideal to manufacture the device at the number of the steps as small as possible. Then, the driving circuit, which is conventionally constituted by the CMOS circuit, is constituted by using TFTs the conductivity type of which belongs to either of the N type or the P type. With this method, a part of an ion doping step can be omitted, and the number of the photomasks can also be decreased.
However, if the driving circuit is constricted by using TFTs the conductivity type of which belongs to either of the N type or the P type, the following problem occurs. This problem will be explained below.
FIG. 9A shows examples of a CMOS inverter (I) which is conventionally used in general, and inverters (II) and (III) which are constituted by using TFTs of the polarity of any one of the N type and the P type. The inverter (II) is a TFT load-type inverter, and the inverter (III) is a resistance load-type inverter. Hereinafter, the respective operations will be described.
FIG. 9B shows a waveform of a signal inputted to the inverter. Here, it is assumed that an input signal amplitude has VDD-GND (GND<VDD). Specifically, it is assumed that GND=0[V].
Note that, the foregoing term “VDD-GND” denotes a range from a potential denoted by VDD to a potential denoted by GND. In the present specification, a range of the potentials is referred by giving the symbol “-” in the middle of GND, VDD, and the like that denote each of the potentials. For example, GND-VDD1 represents a range from the potential denoted by GND to the potential denoted by VDD1. Also, in the present specification, as an exception such as a gate-source voltage, there is a case where the symbol “-” is given in the middle of a gate and a source. The gate-source voltage in this case denotes the voltage generated between a gate electrode and a source of a transistor and does not denote the range between the gate and the source.
A circuit operation will be explained. Note that, for clarification and simplification of the explanation, it is assumed that the threshold voltages of N-type TFTs constituting a circuit are not irregular and are uniformly defined as VthN. Similarly, the threshold voltages of P-type TFTs are uniformly defined as VthP.
When a signal as shown in FIG. 9B is inputted to the CMOS inverter in the state that the potential of the input signal is at the H level (VDD), a P-type TFT 901 is turned OFF and an N-type TFT 902 is turned ON, so that the potential of an output node comes to have the L level (GND). On the contrary, when the potential of the input signal is at the L level, the P-type TFT 901 is turned ON and the N-type TFT 902 is turned OFF, so that the potential of the output node comes to have the H level (FIG. 9C).
Next, the operation of the TFT load-type inverter (II) will be described. Similarly a case where a signal as shown in FIG. 9B is inputted will be considered. First, when the input signal is at the L level, an N-type TFT 904 is turned OFF. On the other hand, a load TFT 903 always operates under saturation condition, therefore the potential of an output node is raised in a direction of the H level. On the other hand, when the input signal is at the H level, the N-type TFT 904 is turned ON. Here, the current capacity of the N-type TFT 904 is made sufficiently higher than that of the load TFT 903, so that the potential of the output node is lowered in a direction of the L level.
Also with respect to the resistance load-type inverter (III), similarly, if the ON resistance value of an N-type TFT 906 is made sufficiently lower than that of a load resistor 905, when an input signal is at the H level, the N-type TFT 906 is turned ON, so that the potential of an output node is lowered in a direction of the L level. When the input signal is at the L level, the N-type TFT 906 is turned OFF, so that the potential of the output node is raised in a direction of the H level.
However, when the TFT load type inverter or the resistance load-type inverter is used, there is a problem as described below. FIG. 9D shows an output waveform of the TFT load-type inverter. When the output is at the H level, the potential becomes lower than VDD by the amount denoted by numeral 907. In the load TFT 903, when a terminal of an output node side is a source, and a terminal of a power source VDD side is a drain, a gate electrode and a drain region are connected to each other. Therefore, the potential of the gate electrode at this time is VDD. Also, under the condition allowing the load TFT in an ON state, the gate-source voltage of the TFT 903 is larger than VthN, resulting in that the potential of the output node rises to at most a value (VDD−VthN) obtained by subtracting VthN from VDD. That is, the value denoted by numeral 907 is equal to VthN. Further, according to the ratio of the current capacity of the load TFT 903 to that of the N-type TFT 904, when the output potential is at the L level, the potential becomes higher than GND by the amount denoted by numeral 908. In order to make this sufficiently close to GND, the current capacity of the N-type TFT 904 has to be set sufficiently high as compared with the load TFT 903. Similarly, FIG. 9E shows an output waveform of the resistance load type inverter. According to the ratio of the resistance value of the load resistor 905 to the ON resistance of the N-type TFT 906, the potential becomes high by the amount indicated by numeral 909. That is, when the inverter constituted by the TFTs of only one polarity shown here is employed, amplitude attenuation of the output signal occurs relative to the amplitude of the input signal. In order to form the driving circuit, the output has to be obtained without attenuating the amplitude.